Scott Beamer

Scott Beamer

Assistant Professor

Computer Science and Engineering

University of California, Santa Cruz

Office: Engineering 2 Room 229

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I design architectures for data-intensive applications, with a focus on improving communication efficiency. I am interested in: computer architecture, agile and open-source hardware design, graph processing, and data movement optimization. I lead the Vertical Architectures, Memory, and Algorithms (VAMA) group, and we are part of the Hardware Systems Collective.

I completed my PhD in Computer Science at UC Berkeley while creating the GAP Project and contributing early to RISC-V. Previously, I was a postdoctoral fellow at Lawrence Berkeley National Lab in the Computer Architecture Group. I received an NSF CAREER Award in 2022.

Want to learn to leverage domain insights to create blazing fast software and efficient architectures? I am currently seeking motivated and curious graduate students. If interested, please contact me and apply to UC Santa Cruz!



I have the good fortune to be working with:

I am grateful to have worked with our group alumni:

I am the coach for UCSC's student cluster team, the Not So Slow Slugs. We also benefit from mentors Nilesh Negi and Yiwei Wang. The team has competed twice in the virtual ISC (2nd in 2023), and twice in the Winter Classic Invitational (3rd in 2021, 2nd in 2023).


My research focuses on improving communication efficiency, since for many data-intensive workloads, accessing the necessary data (communication) is often a bigger challenge than the computation itself. For these communication-bound workloads, optimizing communication can bring many benefits, whether it be improved performance, decreased energy consumption, or reduced manufacturing cost. Much of my work focuses on graph processing, as its data-intensive nature exposes many communication challenges. Going forward, I'm excited to bring my approach to other computational patterns and application domains.

To improve communication efficiency, one can either reduce the amount of communication (move less data) or accelerate the rate of communication (increase utilized bandwidth). My research utilizes both approaches, and I apply them by optimizing software or designing new hardware. To guide these optimization efforts, I analyze the workload to identify bottlenecks. To more aggressively improve hardware communication efficiency, I also investigate the best ways to leverage new technologies such as monolithically integrated silicon photonics.


RepCut: Superlinear Parallel RTL Simulation with Replication-Aided Partitioning
Haoyuan Wang, Scott Beamer
International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2023
Distinguished Paper Award
PDF ACM code artifact

ESSENT: A High-Performance RTL Simulator
Scott Beamer, Thomas Nijssen, Krishna Pandian, Kyle Zhang
Workshop on Open-Source EDA Technology (WOSET), at International Conference on Computer-Aided Design (ICCAD), 2021
PDF slides video

Evaluation of Graph Analytics Frameworks Using the GAP Benchmark Suite
Ariful Azad, Mohsen Mahmoudi Aznaveh, Scott Beamer, Mark Blanco, Jinhao Chen, Luke D’Alessandro, Roshan Dathathri, Tim Davis, Kevin Deweese, Jesun Firoz, Henry A Gabb, Gurbinder Gill, Balint Hegyi, Scott Kolodziej, Tze Meng Low, Andrew Lumsdaine, Tugsbayasgalan Manlaibaatar, Timothy G Mattson, Scott McMillan, Ramesh Peri, Keshav Pingali, Upasana Sridhar, Gabor Szarnyas, Yongzhe Zhang, Yunming Zhang
International Symposium on Workload Characterization (IISWC), October 2020

A Case for Accelerating Software RTL Simulation
Scott Beamer
IEEE Micro, 2020

Efficiently Exploiting Low Activity Factors to Accelerate RTL Simulation
Scott Beamer and David Donofrio
Design Automation Conference (DAC), San Francisco, July 2020

Reducing Pagerank Communication via Propagation Blocking
Scott Beamer, Krste Asanović, and David Patterson
International Parallel & Distributed Processing Symposium (IPDPS), Orlando, May 2017
Best Paper Award

Understanding and Improving Graph Algorithm Performance
Scott Beamer
Ph.D. Thesis, University of California Berkeley, September 2016
SPEC Kaivalya Dixit Distinguished Dissertation Award

The Rocket Chip Generator
Krste Asanović, Rimas Avižienis, Jonathan Bachrach, Scott Beamer, David Biancolin, Christopher Celio, Henry Cook, Palmer Dabbelt, John Hauser, Adam Izraelevitz, Sagar Karandikar, Benjamin Keller, Donggyu Kim, John Koenig, Yunsup Lee, Eric Love, Martin Maas, Albert Magyar, Howard Mao, Miquel Moreto, Albert Ou, David Patterson, Brian Richards, Colin Schmidt, Stephen Twigg, Huy Vo, and Andrew Waterman
Technical Report UCB/EECS-2016-17, EECS Department, University of California, Berkeley, April 2016
TR repo

Distributed-Memory Breadth-First Search on Massive Graphs
Aydın Buluç, Scott Beamer, Kamesh Madduri, Krste Asanović, and David Patterson
In D. Bader, editor, Parallel Graph Algorithms, CRC Press, Taylor-Francis, 2018 (in press)
PDF site

GAIL: The Graph Algorithm Iron Law
Scott Beamer, Krste Asanović, and David Patterson
Workshop on Irregular Applications: Architectures and Algorithms (IA^3), at the International Conference for High Performance Computing, Networking, Storage and Analysis (SC), Austin, November 2015
PDF ACM site

Locality Exists in Graph Processing: Workload Characterization on an Ivy Bridge Server
Scott Beamer, Krste Asanović, and David Patterson
International Symposium on Workload Characterization (IISWC), Atlanta, October 2015
Best Paper Award

The GAP Benchmark Suite
Scott Beamer, Krste Asanović, and David Patterson
arXiv:1508.03619 [cs.DC], 2015
arXiv site

Distributed Memory Breadth-First Search Revisited: Enabling Bottom-Up Search
Scott Beamer, Aydın Buluç, Krste Asanović, and David Patterson
Workshop on Multithreaded Architectures and Applications (MTAAP), at the International Parallel & Distributed Processing Symposium (IPDPS), Boston, May 2013

Direction-Optimizing Breadth-First Search
Scott Beamer, Krste Asanović, and David Patterson
International Conference on High Performance Computing, Networking, Storage and Analysis (SC), Salt Lake City, Utah, November 2012
Best Student Paper Finalist
ACM errata corrected site
Journal of Scientific Programming (JSP), 21(3-4), October 2013

Portable Parallel Performance from Sequential, Productive, Embedded Domain-Specific Languages
Shoaib Kamil, Derrick Coetzee, Scott Beamer, Henry Cook, Ekaterina Gonina, Jonathan Harper, Jeffrey Morlan, and Armando Fox
Symposium on Principles and Practice of Parallel Programming (PPoPP), New Orleans, Louisiana, February 2012

Searching for a Parent Instead of Fighting Over Children: A Fast Breadth-First Search Implementation for Graph500
Scott Beamer, Krste Asanović, and David Patterson
Technical Report UCB/EECS-2011-117, EECS Department, University of California, Berkeley, November 2011

Re-Architecting DRAM Memory Systems with Monolithically Integrated Silicon Photonics
Scott Beamer, Chen Sun, Yong-jin Kwon, Ajay Joshi, Christopher Batten, Vladimir Stojanović, Krste Asanović
International Symposium on Computer Architecture (ISCA), Saint-Malo, France, June 2010

A Design-Space Exploration for CMOS Photonic Processor Networks
Vladimir Stojanović, Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Scott Beamer, Chen Sun, Krste Asanović
Optical Fiber Communication Conference and Exposition and The National Fiber Optic Engineers Conference (OFC/NFOEC), (invited paper), San Diego, CA, March 2010

Limits and Opportunities for Designing Manycore Processor-to-Memory Networks using Monolithic Silicon Photonics
Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Scott Beamer, Imran Shamim, Krste Asanović, and Vladimir Stojanović
Workshop on Photonic Interconnects & Computer Architecture (PICA), at the International Symposium on Microarchitecture (MICRO), New York, NY, December 2009

Designing Multisocket Systems with Silicon Photonics
Scott Beamer
M.S. Thesis, University of California Berkeley, December 2009

Designing Multi-socket Systems Using Silicon Photonics
Scott Beamer, Krste Asanović, Christopher Batten, Ajay Joshi, and Vladimir Stojanović
International Conference on Supercomputing (ICS), Yorktown Heights, NY, June 2009

Silicon-Photonic Clos Networks for Global On-Chip Communication
Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Scott Beamer, Imran Shamim, Krste Asanović, and Vladimir Stojanović
International Symposium on Networks-on-Chip (NoCS), San Diego, CA, May 2009
Best Paper Finalist

Professional Service

Funding Acknowledgements

I am grateful to the following organizations that support my group: University of California, Army Research Office, Intel, National Science Foundation, Amazon Web Services, Xilinx, and GitHub.