CSE 228A: AGILE HARDWARE DESIGN

Instructor: Scott Beamer (sbeamer@ucsc.edu)

Winter 2023, MWF 2:40-3:45, E2-194

Agile Hardware Design techniques take the best of software engineering methods and apply them to improve hardware design productivity. Agile approaches not only reduce the time to solution, but they can also produce solutions which are better tailored for their target problems. In this course, we cover these techniques while taking advantage of the Chisel hardware design language which brings the strengths of functional object-oriented programming to hardware design. The course will consist of engaging lectures (intermixed coding demos and guest speakers) and progressive design assignments that culminate in a small project.

Prerequisites - Equivalent experience in at least 1 of the following 3 areas (2 recommended): logic design (Verilog/VHDL e.g. CSE 100/125), computer architecture (CSE 120/220), advanced programming (functional, object oriented, etc...).

Frequently Asked Questions
1) Can I see the course materials?
Yes! The course is built on open source technologies and we open-source as much of it as we can. You can see the materials from the last offering: https://classes.soe.ucsc.edu/cse293/Winter22/

2) How can undergrads enroll?
Please fill out this Google Form (https://forms.gle/ewRBrmzcYc1MNkXt8) and we will send instructions on how to enroll right before the quarter. Undergrads have made great contributions to prior offerings of this course, and we want to accommodate as many in this offering as we can.

3) How much hardware background/experience is necessary?
This course attempts to bring the best of software engineering to hardware design. Thus, by the end of the course, everyone will be using quite a bit of both skill sets. In practice in prior offerings, 1-2 courses of hardware background have been sufficient. We are keen to include software experts into the hardware ecosystem!